Large capacity memories are sometimes needed to store image data generated by mobile systems equipped with a digital camera module or capable of accessing an Internet. Generally, mobile phones use a NOR type flash memory as a high-speed random access memory to store instruction codes for processing the data. However, NOR type flash memory may be relatively expensive to use in applications requiring more capacity (such as to store image data). Accordingly, NOR type flash memories may not be widely used for such applications.
NAND type flash memory devices operate at a lower speed compared to the NOR type flash memory, however, NAND type flash memories may be more cost effective than NOR type flash memories in applications which call for more storage capacity, such as storing image data generated by a digital camera in a mobile phone. However, the slower speed of the NAND type flash memory devices may make using these devices problematic.
In some mobile applications, a central processing unit (CPU) controls the storage of image data in a DRAM and performs digital image processing, such as compressing the stored image data, so that the processed data may be stored in a NAND type flash memory. The CPU accesses the DRAM and the NAND type flash memory via respective interfaces. The DRAM may communicate with the NAND type flash memory using Direct Memory Access (DMA). Accordingly, using a DRAM as a buffer may enable the use of the slower type flash memory (i.e., NAND type flash memory).
Performance of such a mobile system may be reduced since the NAND type flash memory operates at a lower speed than the DRAM. Additionally, since the CPU accesses the DRAM and the NAND type flash memory using respective hardware interfaces (i.e., pins) the size of the CPU package may be relatively large when the system is integrated into a single chip, which may affect the overall size/weight of a mobile phone (due to the use of the NAND type flash memory).
It is known to provide a system interface in which the system (such as a CPU) communicates with a NAND type flash memory using a static random access memory (SRAM) as a buffer (introduced by Toshiba Corporation of Japan). In this approach, the NAND type flash memory may be effectively controlled at the speed of the interface between the system and the SRAM.
Korean patent laid open publication number 2002-95109, by Hitatchi, discusses a semiconductor device including a non-volatile memory (such as a flash memory), a DRAM with a control circuit connected to both the flash memory and the DRAM, and having a structure for integrating those memories into a multi-chip module. In this approach the control circuit of the semiconductor memory device loads data into the DRAM and then transfers the loaded data from the DRAM to the flash memory responsive to an external command. During a read operation, data stored in the flash memory is transferred to the DRAM, and then the transferred data is read from the DRAM.